This board, part of the New Micros 2x4" series, is based on a high-performance programmable counter for system timing control. Three 16-bit counters, each with its own clock input, and OUT pin, can be clocked from D C to 8 Mhz. Under software control, the uPD71054 can generate accurate time delays.
The chip contains three counters capable of binary, or BCD, operation. There are six programmable count modes. The counters operate independently and each can be set to a different mode.
After initialization, the uPD71054 can count the delay and generate an interrupt when the task is complete, without further CPU intervention. This eliminates the need for software timing loops and frees the CPU for other tasks.
As with all the boards in this series, a Vertical Stacking Connector in the lower right hand corner provides connections to the processor’s address and data bus, control signals, 5V power and ground. Address decoding of the drivers’ space in memory is accomplished by two octal comparators and 16 two-position jumpers. Each jumper setting corresponds to the state of a particular address line. The NMIS-9002 occupies 4 address locations. Any 4-byte boundary in the 64K address space of the JEDSTACK processor’s bus can be selected by the correct jumper placement.
I used this series quite successfully during the Microship project, and this is excess inventory... only one is available.
